Multi-port memory device with serial input/output interface

Details Multi-port memory device with serial input/output interface Multi-port memory device with serial input/output interface

2010-03-03

2011-10-04

Lappas, Jason (Department: 2827)

Static information storage and retrieval

Addressing

Multiple port access

C365S222000

Reexamination Certificate

active

08031552

ABSTRACT:
A multi-port memory device includes ports, banks, a global data bus, an input/output (I/O) controller, mode register set (MRS), a clock generator, and a test I/O controller. The I/O controller transmits a test signal to the global data bus in response to a mode register enable signal. The MRS generates a test enable signal in response to the mode register enable signal and outputs a mode selection signal which determines a data transmission mode of a test I/O signal in response to the test signal. The clock generator receives an external clock and generates an internal clock based on the external clock in response to the mode selection signal. The test I/O controller inputs/outputs the test I/O signal in synchronism with the internal clock. The mode register enable signal active during a test operation mode for testing a core area of the banks.

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