Stacked semiconductor devices and signal distribution...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S777000, C257SE23173

Reexamination Certificate

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08053882

ABSTRACT:
A stacked semiconductor device includes a plurality of stacked chips, each having a plurality of elements to receive a signal. At least one first ladder main signal line for receiving the signal is arranged to pass through the chips. At least one second ladder main signal line is arranged to pass through the chips. A plurality of ladder buffers buffer the signal applied from the first ladder main signal line to the second ladder main signal line. The signal is uniformly distributed to the stacked chips using a ladder type circuit network technique.

REFERENCES:
patent: 5760478 (1998-06-01), Bozso et al.
patent: 6483364 (2002-11-01), Choi et al.
patent: 7330368 (2008-02-01), Saito et al.
patent: 2006/0092752 (2006-05-01), Seki et al.
patent: 10-107065 (1998-04-01), None
patent: 2006-128339 (2006-05-01), None
patent: 10-0267430 (2000-07-01), None
patent: 10-0366629 (2002-12-01), None
Abstract of KR 1020020022423 published Mar. 27, 2002.

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