Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2007-12-20
2011-10-25
Lee, Hsien Ming (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S124000, C438S126000, C438S127000, C438S494000, C257S666000, C257S674000, C257S735000, C257SE21506
Reexamination Certificate
active
08043898
ABSTRACT:
A method of manufacturing a semiconductor package is provided, which can improve the quality of plating through reduction of plating deviation, and improve molding and soldering efficiencies in forming a molding compound and packaging the semiconductor package onto a printed circuit board.
REFERENCES:
patent: 6882048 (2005-04-01), Ikenaga et al.
patent: 6946324 (2005-09-01), McLellan et al.
patent: 7033517 (2006-04-01), Fan et al.
patent: 2002/0149090 (2002-10-01), Ikenaga et al.
patent: 8-83878 (1996-03-01), None
patent: 2000-311968 (2000-11-01), None
patent: 10-2006-108250 (2006-10-01), None
Choi Kwang-Wook
Lee Ji-Yong
Col Tech Co., Ltd
Ladas & Parry LLP
Lee Hsien Ming
Swanson Walter H
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