Scan testing in single-chip multicore systems

Details Scan testing in single-chip multicore systems Scan testing in single-chip multicore systems

2006-07-28

2011-10-04

Shingleton, Michael (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C324S762100, C365S201000, C714S723000, C714S733000, C714S030000

Reexamination Certificate

active

08030649

ABSTRACT:
Various techniques for testing multicore processors in an integrated circuit. Each core includes a plurality of registers configured to form at least two scan chains. In one embodiment, a verification unit located in the integrated circuit is electrically coupled to outputs of the scan chains. The verification unit is configured to determine the validity of the outputs of the scan chains and to indicate a malfunction of the integrated circuit if the outputs are determined not to be valid.

REFERENCES:
patent: 6055655 (2000-04-01), Momohara
patent: 2008/0023700 (2008-01-01), Gschwind

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