Instruction cache system, instruction-cache-system control...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C711S125000

Reexamination Certificate

active

08086802

ABSTRACT:
An instruction cache system includes an instruction-cache data storage unit that stores cache data per index, and an instruction cache controller that compresses and writes the cache data in the instruction-cache data storage unit, and controls a compression ratio of the written cache data. The instruction cache controller calculates a memory capacity of a redundant area generated due to compression in a memory area belonging to an index, in which n pieces of cache data are written based on the controlled compression ratio, to compress and write new cache data in the redundant area based on the calculated memory capacity.

REFERENCES:
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patent: 6173381 (2001-01-01), Dye
patent: 7243191 (2007-07-01), Ying et al.
patent: 7512750 (2009-03-01), Newburn et al.
patent: 2003/0135694 (2003-07-01), Naffziger et al.
patent: 6-231044 (1994-08-01), None

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