Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2010-09-27
2011-11-01
Alphonse, Fritz (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S755000, C714S786000
Reexamination Certificate
active
08051357
ABSTRACT:
A system includes a supernode generator module configured to generate supernodes. Each of the supernodes includes a plurality of symbol nodes. A supernode splitting module is configured to split each of the supernodes into derived symbols. The total number of edges of the derived symbols in each of the supernodes is equal to a predetermined number of edges of each of the supernodes.
REFERENCES:
patent: 7080365 (2006-07-01), Broughton et al.
patent: 7499490 (2009-03-01), Divsalar et al.
patent: 7523375 (2009-04-01), Spencer
patent: 7607065 (2009-10-01), Bickerstaff et al.
patent: 7673213 (2010-03-01), Chugg et al.
patent: 2003/0188299 (2003-10-01), Broughton et al.
“A New Construction for LDPC Codes using Permutation Polynomials over Integer Rings”; Oscar Y. Takeshita; Jun. 24, 2005; Submitted to IEEE Transactions on Information Theory; 12 Pages.
“On the Computation of the Minimum Distance of Low-Density Parity-Check Codes”; Xiao-Yu Hu and Marc P.C. Fossorier; IBM Research, Zurich Research Laboratory, 8803 Ruschlikon, Switzerland; 17 Pages.
Alphonse Fritz
Marvell International Ltd.
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