Methods for characterizing device variation in electronic...

Details Methods for characterizing device variation in electronic... Methods for characterizing device variation in electronic...

2009-08-17

2011-12-27

Tu, Christine (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C365S189110

Reexamination Certificate

active

08086917

ABSTRACT:
A circuit includes a comparator circuit configured such that its output toggles from a first digital logical level to a second digital logical level when its first and second inputs transition between a first state wherein the first input has an applied voltage greater than an applied voltage at the second input and a second state wherein the first input has an applied voltage less than an applied voltage at the second input. A plurality of cells each have at least one series-connected pair of field effect transistors interconnected at an output node intermediate the field effect transistors. Decoding logic is configured to select a given one of the cells for measurement, and selectively interconnect the output node of the given one of the cells to the first input of the comparator circuit. Voltage supply circuitry is configured to (i) apply voltages to the gates of the pair of transistors of the given one of the cells selected for measurement, such that the pair of transistors operate in a linear region, and have a variable voltage difference, Δ, between their gate-to-source voltages, and (ii) vary the Δ until the comparator circuit output toggles from the first digital logical level to the second digital logical level.

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