Semiconductor device, DRAM integrated circuit device, and...

Details Semiconductor device, DRAM integrated circuit device, and... Semiconductor device, DRAM integrated circuit device, and...

2008-10-15

2010-06-22

Chen, Jack (Department: 2893)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S243000, C438S256000, C438S386000, C438S618000, C257SE21585

Reexamination Certificate

active

07741213

ABSTRACT:
A semiconductor device with a multi-layer wiring structure includes a first conductive region: a second conductive region that has an upper surface located in a higher position than the first conductive region with respect to the substrate; an insulating that covers the first and second conductive regions; a wiring groove that is formed in the insulating film so as to expose the second conductive region; a contact hole that is formed in the insulating film so as to expose the first conductive region; and a wiring pattern that fills the wiring groove and the contact hole. In this semiconductor device, the upper surface of the wiring pattern is located on the same plane as the upper surface of the insulating film.

REFERENCES:
patent: 6020644 (2000-02-01), Tanigawa
patent: 6043528 (2000-03-01), Aoki et al.
patent: 6259149 (2001-07-01), Burkhardt et al.
patent: 6417533 (2002-07-01), Kawata et al.
patent: 6433381 (2002-08-01), Mizutani et al.
patent: 6541333 (2003-04-01), Shukuri et al.
patent: 6780707 (2004-08-01), Lee
patent: 2002/0014648 (2002-02-01), Mizutani et al.
patent: 2002/0153548 (2002-10-01), Mizutani et al.
patent: 2002/0153554 (2002-10-01), Kajita et al.
patent: 2002/0179955 (2002-12-01), Morimoto et al.
patent: 2004/0135185 (2004-07-01), Yabuki
patent: 05-152449 (1993-06-01), None
patent: 9-232534 (1997-09-01), None
patent: 10-200075 (1998-07-01), None
patent: 10-223858 (1998-08-01), None
patent: 11-214650 (1999-08-01), None
patent: 11-354749 (1999-12-01), None
patent: 2000-077407 (2000-03-01), None
patent: 2001-274328 (2001-10-01), None
patent: 2002-050748 (2002-02-01), None
patent: 2002-134607 (2002-05-01), None
patent: 2002-319625 (2002-10-01), None
patent: 2004-134611 (2004-04-01), None
Japanese Office Action mailed Feb. 17, 2009, issued in corresponding Japanese Application No. 2004-564530.
Japanese Office Action mailed Jan. 5, 2010, issued in corresponding Japanese Application No. 2004-564530.

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