Semiconductor device having a copper metal line and method...

Details Semiconductor device having a copper metal line and method... Semiconductor device having a copper metal line and method...

2008-07-08

2010-11-30

Chu, Chris (Department: 2815)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C257SE21249, C257S758000, C438S637000, C438S700000, C438S703000

Reexamination Certificate

active

07842615

ABSTRACT:
A semiconductor device having a copper line and a method of forming the same so as to prevent a bridge phenomenon between neighboring upper lines are described. The method may include the steps of forming a capping layer and an intermetal dielectric layer in a stacked configuration over a substrate in which lower lines are formed, forming trenches defining an upper metal line region on the intermetal dielectric layer, and forming a spacer on inner sidewalls of the trenches. A via may then be formed under the exposed first trench using a photolithography process and the spacer for alignment. After removing the spacer, a barrier metal film may be formed on inner walls of the trenches and the via, a copper metal line film may be gap-filled within the trenches and the via, and a surface of the semiconductor device may be polished.

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patent: 2008/0029864 (2008-02-01), Pyo et al.
patent: 2008/0064217 (2008-03-01), Horii

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