Methods, systems, and computer program products for...

Details Methods, systems, and computer program products for... Methods, systems, and computer program products for...

2007-08-13

2010-06-15

Garbowski, Leigh Marie (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07739644

ABSTRACT:
Disclosed are methods, systems, and computer program products for performing grid morphing technique for computing a spreading of objects over an area such that the final locations of the objects are distributed over the area and such that the final locations of the objects are minimally perturbed from their initial starting locations and the density of objects meets certain constraints. The minimization of perturbation, or stability, of the approaches disclosed, is the key feature which is the principal benefit of the techniques disclosed. The methods described herein may be used as part of a tool for placement or floorplanning of logic gates or larger macroblocks for the design of an integrated circuit.

REFERENCES:
patent: 5636129 (1997-06-01), Her
patent: 6249902 (2001-06-01), Igusa et al.
patent: 7073144 (2006-07-01), Alpert et al.
patent: 7076746 (2006-07-01), Hamlin et al.
patent: 7076755 (2006-07-01), Ren et al.
patent: 7266796 (2007-09-01), Chu et al.
patent: 2007/0204252 (2007-08-01), Furnish et al.
Xiu et al., “Large-Scale Placement by Grid-Warping”, DAC 2004, pp. 351-356.
Alpert et al., “Faster Minimization of Linear Wirelength for Global Placement,” ISPD 1997, pp. 4-11.
Alpert et al., “Plcament Stability Metrics,” 2005 IEEE, pp. 1144-1147.
Brenner et al., “Legalizing a Placement with Total Minimum Movement,” IEEE Trans. on CAD of ICs and Systems, vol. 23, No. 12, Dec. 2004, pp. 1597-1613.
Caldwell et al., “Can Recursive Bisection Alone Produce Routable Placement?”, DAC 2000, pp. 477-482.
Kahng et al., “Architecture and Details of a High Quality, Large-Scale Analytical Placer,” 2005 IEEE, pp. 890-897.
Kleinhans et al., “Gordian: VLSI Placement by Quadradtic Programming and Slicing Optimization,” IEEE Trans. on CAD, vol. 10, No. 3, Mar. 1991, pp. 356-365.
Nam et al., “The ISPD2005 Placement Contest and Benchmark Suite,” ISPD 2005, pp. 216-220.
Ren et al., “Diffusion-Based Placement Migration,” DAC 2005, pp. 515-520.
Sechen et al., “The TimberWolf Placement and Routing Package,” IEEE Journal of Solid-State Circuits, vol. SOC-20, No. 2, Apr. 1985, pp. 510-522.
Sigl et al., “Analytical Placement: A Linear of a Quadratic Objective Function?”, 28thACM/IEEE Design Automation Conference, pp. 427-432.
Tsay et al., “Proud: A Sea-of-Gates Placement Algorithm,” 1988 IEEE Design & Test of Computers, pp. 44-56.
Viswanathan et al., “FastPlace: Efficient Analytical Placement using Cell Shifting, Iterative Local Refinement and a Hybrid Net Model,” ISPD 2004, pp. 26-33.
Vygen, “Algorithms for Large-Scale Flat Placement,” DAC 1997, 6 pages.
Chong et al., “A Morphing Approach to Address Placement Stability,” ISPD '07, Mar. 18-21, 2007, Austin, Texas, pp. 95-102.
Heckbert, P.S. “Fundamentals of texture mapping and image warping,” Master's thesis, University of California, Berkeley, 1989, pp. 1-86.
Roy, J. et al, “Capo: Robust and Scalable Open-Source Min-Cut Floorplacer” ISPD '05, Apr. 3-6, 2005, San Francisco, CA, pp. 224-226.
Non-Final Office Action dated Mar. 5, 2010 for U.S. Appl. No. 11/838,187.

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