Method of fabricating phase change memory cell

Details Method of fabricating phase change memory cell Method of fabricating phase change memory cell

2010-02-24

2010-11-23

Smoot, Stephen W (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S675000, C257SE21206

Reexamination Certificate

active

07838416

ABSTRACT:
A semiconductor device is disclosed. In one embodiment, the semiconductor device includes a memory cell, which in turn includes an electrode and a phase change material. The electrode may be disposed on a substrate and include a sublithographic lateral dimension parallel to the substrate. The phase change material may be coupled to the electrode and include a lateral dimension parallel to the substrate and greater than the sublithographic lateral dimension of the electrode. Various semiconductor devices and manufacturing methods are also provided.

REFERENCES:
patent: 3241009 (1966-03-01), Dewald et al.
patent: 3423646 (1969-01-01), Cubert et al.
patent: 3602635 (1971-08-01), Romankiw
patent: 3699543 (1972-10-01), Neale
patent: 3796926 (1974-03-01), Cole et al.
patent: 3877049 (1975-04-01), Buckley
patent: 3886577 (1975-05-01), Buckley
patent: 4099260 (1978-07-01), Lynes et al.
patent: 4115872 (1978-09-01), Bluhm
patent: 4174521 (1979-11-01), Neale
patent: 4194283 (1980-03-01), Hoffmann
patent: 4203123 (1980-05-01), Shanks
patent: 4227297 (1980-10-01), Angerstein
patent: 4272562 (1981-06-01), Wood
patent: 4420766 (1983-12-01), Kasten
patent: 4433342 (1984-02-01), Patel et al.
patent: 4458260 (1984-07-01), McIntyre et al.
patent: 4499557 (1985-02-01), Holmberg et al.
patent: 4502208 (1985-03-01), McPherson
patent: 4502914 (1985-03-01), Trumpp et al.
patent: 4569698 (1986-02-01), Feist
patent: 4630355 (1986-12-01), Johnson
patent: 4641420 (1987-02-01), Lee
patent: 4642140 (1987-02-01), Noufi et al.
patent: 4666252 (1987-05-01), Yaniv et al.
patent: 4677742 (1987-07-01), Johnson
patent: 4757359 (1988-07-01), Chiao et al.
patent: 4795657 (1989-01-01), Formigoni et al.
patent: 4804490 (1989-02-01), Pryor et al.
patent: 4809044 (1989-02-01), Pryor et al.
patent: 4823181 (1989-04-01), Mohsen et al.
patent: 4876220 (1989-10-01), Mohsen et al.
patent: 4876668 (1989-10-01), Thakoor et al.
patent: 4881114 (1989-11-01), Mohsen et al.
patent: 4892840 (1990-01-01), Esquivel et al.
patent: 4956312 (1990-09-01), Van Laarhoven
patent: 5144404 (1992-09-01), Iranmanesh et al.
patent: 5166096 (1992-11-01), Cote et al.
patent: 5166758 (1992-11-01), Ovshinsky et al.
patent: 5177567 (1993-01-01), Klersy et al.
patent: 5216282 (1993-06-01), Cote et al.
patent: 5223448 (1993-06-01), Su
patent: 5233217 (1993-08-01), Dixit et al.
patent: 5278099 (1994-01-01), Maeda
patent: 5293335 (1994-03-01), Pernisz et al.
patent: 5296716 (1994-03-01), Ovshinsky et al.
patent: 5310693 (1994-05-01), Hsue
patent: 5335219 (1994-08-01), Ovshinsky et al.
patent: 5341328 (1994-08-01), Ovshinsky et al.
patent: 5359205 (1994-10-01), Ovshinsky
patent: 5363329 (1994-11-01), Troyan
patent: 5406125 (1995-04-01), Johnson et al.
patent: 5414221 (1995-05-01), Gardner
patent: 5414271 (1995-05-01), Ovshinsky et al.
patent: 5429988 (1995-07-01), Huang et al.
patent: 5466637 (1995-11-01), Kim
patent: 5500080 (1996-03-01), Choi
patent: 5510629 (1996-04-01), Karpovich et al.
patent: 5529956 (1996-06-01), Morishita
patent: 5534711 (1996-07-01), Ovshinsky et al.
patent: 5534712 (1996-07-01), Ovshinsky et al.
patent: 5536947 (1996-07-01), Klersy et al.
patent: 5569932 (1996-10-01), Shor et al.
patent: 5578185 (1996-11-01), Bergeron et al.
patent: 5614765 (1997-03-01), Avanzino et al.
patent: 5648298 (1997-07-01), Cho
patent: 5665625 (1997-09-01), Sandhu et al.
patent: 5675187 (1997-10-01), Numata et al.
patent: 5677242 (1997-10-01), Aisou
patent: 5687112 (1997-11-01), Ovshinsky
patent: 5705430 (1998-01-01), Avanzino et al.
patent: 5714768 (1998-02-01), Ovshinsky et al.
patent: 5714795 (1998-02-01), Ohmi et al.
patent: 5719089 (1998-02-01), Cherng et al.
patent: 5728596 (1998-03-01), Prall
patent: 5751012 (1998-05-01), Wolstenholme et al.
patent: 5789277 (1998-08-01), Zahorik et al.
patent: 5789758 (1998-08-01), Reinberg
patent: 5814527 (1998-09-01), Wolstenholme et al.
patent: 5831276 (1998-11-01), Gonzalez et al.
patent: 5841150 (1998-11-01), Gonzalez et al.
patent: 5847460 (1998-12-01), Liou et al.
patent: 5869843 (1999-02-01), Harshfield
patent: 5874359 (1999-02-01), Liaw et al.
patent: 5920788 (1999-07-01), Reinberg
patent: 6077729 (2000-06-01), Harshfield
patent: 6111319 (2000-08-01), Liou et al.
patent: 6117720 (2000-09-01), Harshfield
patent: 6337266 (2002-01-01), Zahorik
patent: 6420725 (2002-07-01), Harshfield
patent: 6531391 (2003-03-01), Zahorik
patent: 6635951 (2003-10-01), Zahorik
patent: 6797612 (2004-09-01), Zahorik
patent: 7273809 (2007-09-01), Zahorik
patent: 7494922 (2009-02-01), Zahorik
patent: 0 117 045 (1984-08-01), None
patent: 1 319 388 (1973-06-01), None
patent: 60109266 (1985-06-01), None
patent: 4045585 (1992-02-01), None
Kim and Kim, “Effects of High-Current Pulses on Polycrystalline Silicon Diode with n-type Region Heavily Doped with Both Boron and Phosphorus,”J. Appl. Phys., 53(7):5359-5360, Jul. 1982.
Neale and Aseltine, “The Application of Amorphous Materials to Computer Memories,”IEEE Transactions on Election Devices, 20(2):195-205, Feb. 1973.
Pein and Plummer, “Performance of the 3-D Sidewall Flash EPROM Cell,”International Electron Devices Meeting,, 11-14, Dec. 1993.
Post and Ashburn, “Investigation of Boron Diffusion in Polysilicon and its Application to the Design of p-n-p Polysilicon Emitter Bipolar Transistors with Shallow Emitter Junctions,”IEEE Transactions on Electron Devices, 38(11):2442-2451, Nov. 1991.
Post et al., “Polysilicon Emitters for Bipolar Transistors: A Review and Re-Evaluation of Theory and Experiment,”IEEE Transactions on Electron Devices, 39(7):1717-1731, Jul. 1992.
Post and Ashburn, “The Use of an Interface Anneal to Control the Base Current and Emitter Resistance of p-n-p Polysilicon Emitter Bipolar Transistors,”IEEE Electron Device Letters, 13(8):408-410, Aug. 1992.
Rose et al., “Amorphous Silicon Analogue Memory Devices,”J. Non-Crystalline Solids, 115:168-170, 1989.
Schaber et al., “Laser Annealing Study of the Grain Size Effect in Polycrystalline Silicon Schottky Diodes,”J. Appl. Phys., 53(12):8827-8834, Dec. 1982.
Yamamoto et al., “The I-V Characteristics of Polycrystalline Silicon Diodes and the Energy Distribution of Traps in Grain Boundaries,”Electronics and Communications in Japan, Part 2, 75(7):51-58, 1992.
Yeh et al., “Investigation of Thermal Coefficient for Polycrystalline Silicon Thermal Sensor Diode,”Jpn. J. Appl. Phys., 31(Part 1, No. 2A):151-155, Feb. 1992.
Oakley et al., “Pillars—The Way to Two Micron Pitch Multilevel Metallisation,”IEEE, 23-29, 1984.
Prince, “Semiconductor Memories,” A Handbook of Design, Manufacture, and Application, 2ndEd., Wiley, pp. 118-123, 1991.

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