Local memory management system with plural processors

Details Local memory management system with plural processors Local memory management system with plural processors

2007-05-22

2010-06-15

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S203000, C711S209000, C711SE12066

Reexamination Certificate

active

07739457

ABSTRACT:
An information processing system includes a first processor having a first local memory, a second processor having a second local memory, and a third processor having a third local memory. The system further includes a unit which maps one of the second and third local memories in part of an effective address space of a first thread to be executed by the first processor. The mapped one of the second and third local memories is the local memory of a corresponding one of the second and third processors, which executes a second thread interacting with the first thread. The system also includes a unit that changes a local memory to be mapped in part of the effective address space of the first thread from the one of the second and third local memories to the other.

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