Mask pattern correction program and system

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C700S097000, C700S120000, C700S121000, C430S005000, C378S035000, C382S144000, C382S154000

Reexamination Certificate

active

07844939

ABSTRACT:
The present invention provides a mask pattern correction program for correcting a design pattern which serves as a source to form a mask pattern so that, by exposure of a mask with a pattern formed thereon onto a substrate, the mask pattern is transferred as designed, the mask pattern correction program including performing, on a computer, the steps of: determining, before simulation of the dimension of the pattern transferred by exposure, whether the simulation result will converge; and classifying design pattern edges into first and second target edges, correct the first target edges and perform simulation thereon if it is determined that the simulation result will not converge.

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patent: 2003/0219154 (2003-11-01), Medvedeva et al.
patent: 2005/0050512 (2005-03-01), Kochan et al.
patent: 2007/0157152 (2007-07-01), Strelkova et al.
patent: 2008/0216040 (2008-09-01), Furnish et al.
patent: 10-083064 (1998-03-01), None
patent: 10-104818 (1998-04-01), None
patent: 2000-098584 (2000-04-01), None
patent: 2001-188336 (2001-07-01), None
patent: 2002-062633 (2002-02-01), None
patent: 2005-055563 (2005-03-01), None

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