Semiconductor memory devices having optimized memory block...

Details Semiconductor memory devices having optimized memory block... Semiconductor memory devices having optimized memory block...

2007-11-06

2010-06-15

Dinh, Son (Department: 2824)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S185110, C365S063000

Reexamination Certificate

active

07738311

ABSTRACT:
Multi-bank semiconductor memory devices are provided having optimized memory block layouts and data line routing to enable chip size reduction and increase operating memory access speed.

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patent: 7106612 (2006-09-01), Kim
patent: 2002/0015350 (2002-02-01), Tomishima et al.
patent: 2006/0117155 (2006-06-01), Ware et al.
Yamauchi, Tadaaki, Lance Hammond and Kunle Olukotun, “The Hierarachical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors”, ULSI Laboratory, Mitsubishi Electric Corporation; Computer System Laboratory, Stanford University.

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