SRAM cell having asymmetric pass gates

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Reexamination Certificate

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C365S063000, C365S072000

Reexamination Certificate

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07813162

ABSTRACT:
Conductive stripes laterally abutting the dielectric lines are formed over a thin semiconductor layer on a gate dielectric. Angled halo ion implantation is performed to implant p-type dopants on the side of the drains of pull-down transistors and a first source/drain region of each pass gate transistor. The dielectric lines are removed and the pattern of the conductive stripes is transferred into the semiconductor layer to form gate electrodes. The resulting pass gate transistors are asymmetric transistors have a halo implantation on the side of the first source/drain regions, while the side of a second source/drain regions does not have such a halo implantation. As such, the pass gate transistors provide enhanced readability, writability, and stability.

REFERENCES:
patent: 6466489 (2002-10-01), Ieong et al.
patent: 2007/0076468 (2007-04-01), Schoellkopf
patent: 2008/0175039 (2008-07-01), Thomas et al.
patent: 2009/0014798 (2009-01-01), Zhu et al.
patent: 2009/0073758 (2009-03-01), Freeman et al.
patent: 2009/0185409 (2009-07-01), Bansal et al.

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