Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
Reexamination Certificate
2007-02-01
2010-02-09
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Scoreboarding, reservation station, or aliasing
Reexamination Certificate
active
07660971
ABSTRACT:
A method for dependency tracking and flush recovery for an out-of-order processor includes recording, in a last definition (DEF) data structure, an identifier of a first instruction as the most recent instruction in an instruction sequence that defines contents of the particular logical register and recording, in a next DEF data structure, the identifier of the first instruction in association with an identifier of a previous second instruction also indicating an update to the particular logical register. In addition, a recovery array is updated to indicate which of the instructions in the instruction sequence updates each of the plurality of logical registers. In response to misspeculation during execution of the instruction sequence, the processor performs a recovery operation to place the identifier of the second instruction in the last DEF data structure by reference to the next DEF data structure and the recovery array.
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Moudgill, Mayan, Pingali, Keshav, Vassiliadis, Stamatis. “Register renaming and dynamic speculation: an alternative approach” Sep. 1993.
Agarwal Vikas
Burky William E.
Kailas Krishnan
Sinharoy Balaram
Chan Eddie P
Dillon & Yudell LLP
International Business Machines - Corporation
Petranek Jacob
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