Method for IC wiring yield optimization, including wire...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

07657859

ABSTRACT:
Disclosed are embodiments of a method, service, and computer program product for performing yield-aware IC routing for a design. The method performs an initial global routing which satisfies wiring congestion constraints. Next, the method performs wire spreading and wire widening on the global route, layer by layer, based on, for example, a quadratic congestion optimization. Following this, timing closure is performed on the global route using results of the wire spreading and wire widening. Post-routing wiring width and wire spreading adjustments are made using the critical area yield model. In addition, the method allows for the optimization of already-routed data.

REFERENCES:
patent: 6202196 (2001-03-01), Huang et al.
patent: 6305004 (2001-10-01), Tellez et al.
patent: 6543035 (2003-04-01), Ohba et al.
patent: 6892371 (2005-05-01), Teig et al.
patent: 6934924 (2005-08-01), Paul et al.
patent: 7064043 (2006-06-01), Rouse
patent: 7114142 (2006-09-01), Segal et al.
patent: 7185305 (2007-02-01), Rodman
patent: 7386815 (2008-06-01), Bickford et al.
patent: 7415687 (2008-08-01), Lahner et al.
patent: 2003/0023938 (2003-01-01), Nagasaka et al.
patent: 2003/0051217 (2003-03-01), Cheng
patent: 2004/0243953 (2004-12-01), Ramachandran et al.
patent: 2004/0250230 (2004-12-01), Itou et al.
patent: 2005/0289494 (2005-12-01), Kozhaya et al.

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