Semiconductor package with passivation island for reducing...

Details Semiconductor package with passivation island for reducing... Semiconductor package with passivation island for reducing...

2007-09-20

2010-02-23

Zameke, David A (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Solder wettable contact, lead, or bond

C257SE23069

Reexamination Certificate

active

07667335

ABSTRACT:
A flip chip style semiconductor package has a substrate with a plurality of active devices formed thereon. A contact pad is formed on the substrate. An under bump metallization (UBM) layer is in electrical contact with the contact pad. A passivation layer is formed over the substrate. In one case, the UBM layer is disposed above the passivation layer. Alternatively, the passivation layer is disposed above the UBM layer. A portion of the passivation layer is removed to create a passivation island. The passivation island is centered with respect to the contact pad with its top surface devoid of the UBM layer. A solder bump is formed over the passivation island in electrical contact with the UBM layer. The passivation island forms a void in the solder bump for stress relief. The UBM layer may include a redistribution layer such that the passivation island is offset from the contact pad.

REFERENCES:
patent: 6867122 (2005-03-01), Weng
patent: 7015590 (2006-03-01), Jeong et al.
patent: 7122458 (2006-10-01), Cheng et al.
patent: 7176583 (2007-02-01), Daubenspeck et al.
patent: 7187078 (2007-03-01), Lin et al.
patent: 2004/0134974 (2004-07-01), Oh et al.
patent: 2005/0020047 (2005-01-01), Mis et al.
patent: 2007/0075423 (2007-04-01), Ke et al.

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