Logic circuit redesign program, logic circuit redesign...

Details Logic circuit redesign program, logic circuit redesign... Logic circuit redesign program, logic circuit redesign...

2007-09-18

2010-06-08

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07735028

ABSTRACT:
A computer is allowed to execute an information acquisition process that acquires a file expressing information on pins used in respective ports provided in each block of a logic circuit to be redesigned and information indicating connection relationships between the ports (#2); execute a multiplexer disposition process that, based on the file, classifies pins of output ports of a block into a number of pin groups that is less than the number of pins, and disposes a multiplexer having a function to multiplex a signal output from each pin classified in the same pin group (#11, #13); and execute a demultiplexer disposition process that, based on that file, disposes a demultiplexer having a function to demultiplex signals that have been output from output ports of a block and multiplexed by the multiplexer, and a function to output each demultiplexed signal to input ports of respective input destination blocks (#12, #13).

REFERENCES:
patent: 2007/0174794 (2007-07-01), Oktem et al.
patent: 8-30653 (1996-02-01), None
patent: 11-73440 (1999-03-01), None

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