Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1995-10-30
1999-03-02
Bowers, Charles
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438155, 438165, 438635, H01L 214763
Patent
active
058770836
ABSTRACT:
It is intended to reduce occurrences of interlayer short-circuiting due to pinholes existing in an interlayer insulating film particularly in a circuit formed on an insulating substrate. A wiring line mainly made of an anodizable metal such as aluminum, tantalum, titanium, or the like is formed on an insulating surface, and an interlayer insulating film is so formed as to cover the metal wiring line. The substrate is then immersed in an electrolyte of, for instance, ammonium tartrate. Portions of the metal wiring line which are exposed by the pinholes of the interlayer insulating film are selectively anodized by allowing a current to flow through the wiring line by using it as one of the electrodes and gradually increasing a voltage difference between the wiring line and the opposed electrode. Thus, insulation performance of the interlayer insulating film is improved.
REFERENCES:
patent: 5236573 (1993-08-01), Shannon
patent: 5264728 (1993-11-01), Ikeda et al.
patent: 5508216 (1996-04-01), Inoue
patent: 5585290 (1996-12-01), Yamamoto
Translation of JP 1-185522, Jun. 1989.
Bowers Charles
Ferguson Jr. Gerald J.
Hawranek Scott J.
Robinson Eric J.
Semiconductor Energy Laboratory Co,. Ltd.
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