Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-10-14
1999-03-02
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438624, 438638, 438700, H01L 2144
Patent
active
058770763
ABSTRACT:
A method is disclosed for forming dual damascene interconnections in semiconductor chips through the use of opposite type two-layered photoresist process. A silicon substrate is provided having a composite layer comprising a first layer of dielectric separated from a second layer of dielectric by an intervening intermediate layer of silicon nitride. Then, a layer of positive (P-type) chemical amplification resist (CAR) is deposited over the composite dielectric layer. The P-type resist is next line patterned by exposing and developing it through a dark field mask. This is followed by cross-linking the remaining P-type resist by performing a hard-bake. An opposite polarity, namely, a negative (N-type) CAR is next formed over the opposite P-type resist, and hole patterned through a clear field mask. Because of cross-linking, the P-type resist is not affected during hole patterning of the opposite N-type resist. The hole pattern is next transferred by dry etching into the top dielectric layer and then into the intervening silicon nitride layer in the composite layer. The line pattern in the P-type CAR layer is etched into the top dielectric layer at the same time the hole pattern is transferred from the top dielectric layer into the bottom dielectric layer by the same etching process. The photoresist layers are then removed and the dual damascene structure thusly formed is filled with metal forming the line trench and hole interconnection on the semiconductor substrate.
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Ackerman Stephen B.
Industrial Technology Research Institute
Nguyen Tuan H.
Saile George O.
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