Starvation-avoiding unbounded transactional memory

Details Starvation-avoiding unbounded transactional memory Starvation-avoiding unbounded transactional memory

2007-03-06

2010-06-01

Song, Jasmine (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S146000, C711S150000, C711S151000, C711S152000, C710S200000

Reexamination Certificate

active

07730265

ABSTRACT:
One embodiment of the present invention provides a system that facilitates efficient transactional execution. During operation, the system executes a starvation-avoiding transaction for a thread, wherein executing the starvation-avoiding transaction involves: (1) placing load-marks on cache lines which are loaded during the starvation-avoiding transaction; (2) placing store-marks on cache lines which are stored to during the starvation-avoiding transaction; and (3) writing a timestamp value into metadata for load-marked and store-marked cache lines. While the thread is executing the starvation-avoiding transaction, the system prevents other threads from executing another starvation-avoiding transaction. Whereby the load-marks and store-marks prevent interfering accesses from other threads to the cache lines during the starvation-avoiding transaction.

REFERENCES:
patent: 6928525 (2005-08-01), Ebner et al.
patent: 7269693 (2007-09-01), Tremblay et al.
patent: 7269694 (2007-09-01), Tremblay et al.

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