Flash memory device and method of erasing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S406000, C257S411000, C257SE21423, C257SE29155, C257SE29309, C438S287000, C438S288000, C438S591000, C438S592000

Reexamination Certificate

active

07851847

ABSTRACT:
A flash memory device includes a tunnel insulating layer formed over a semiconductor substrate, a charge trap layer formed over the tunnel insulating layer and configured to trap electric charges, a blocking insulating layer formed over the charge trap layer, and a gate electrode formed over the blocking insulating layer and including a first conductive layer and a second conductive layer doped with N and P impurities respectively. Further, a method of erasing a flash memory device includes providing a flash memory device including a gate electrode having a first conductive layer and a second conductive layer doped with N and P impurities respectively, and performing an erase operation in a state where a thickness of a depletion layer at an interface of a PN junction comprising the first conductive layer and the second conductive layer is increased due to a negative potential bias applied to the gate electrode.

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patent: 1020060100995 (2006-09-01), None

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