Method to improve ferroelectronic memory performance and...

Details Method to improve ferroelectronic memory performance and... Method to improve ferroelectronic memory performance and...

2007-12-27

2010-02-23

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Systems using particular element

Ferroelectric

Reexamination Certificate

active

07667997

ABSTRACT:
One embodiment of the present invention relates to a method by which the imprint of a ferroelectric random access memory (FRAM) array is reduced. The method begins when an event that will cause imprint to the memory array is anticipated by an external agent to the device comprising the chip. The external agent sends a command to the control circuitry that the data states are to be written to a particular data state. Upon receiving a signal the control circuitry writes all of the ferroelectric memory cells in the FRAM array to a preferred memory data state. The memory data states are held in the preferred data state for the entire duration of the event to minimize imprint of the FRAM memory cells. When the event ends the external agent sends a command to the control circuitry to resume normal memory operation. Other methods and circuits are also disclosed.

REFERENCES:
patent: 5953245 (1999-09-01), Nishimura
patent: 6781864 (2004-08-01), Basceri et al.

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