Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-06-07
2010-02-16
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C717S140000, C716S030000, C716S030000
Reexamination Certificate
active
07665059
ABSTRACT:
A Hardware Description Language (HDL) utilizing a Term Rewriting System (TRS) is provided that simplifies handling of clocks, and signaling between various clock domains of a multi-clock domain circuit specification. A specific clock data type is supplied for use with clock signals. Using the clock data type, and other requirements of a circuit specification, clock domain crossing between domains of clocks of the same clock family is handled implicitly. For clock domain crossing between clock domains driven by clocks of different clock families, a “hardware approach” and a “linguistic approach” are provided. A “hardware approach” provides facilities to explicitly specify a synchronizer, using, in part, TRS rules. A “linguistic approach” allows a designer to abstracts the instantiation of synchronizers and instead specify a circuit specification in terms of differently clocked interfaces.
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Czeck Edward W.
Nanavati Ravi A.
Nikhil Rishiyur S.
Stoy Joseph E.
Bluespec, Inc.
Dinh Paul
Loginov William A.
Loginov & Associates PLLC
Nguyen Nha T
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