Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2010-02-18
2010-10-12
Patel, Hetul (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S003000, C711S133000, C711S146000, C711S148000
Reexamination Certificate
active
07814285
ABSTRACT:
A method and apparatus for filtering memory probe activity for writes in a distributed shared memory computer. In one embodiment, the method may include initiating a first store operation to a cache data block stored in a first cache from a first processing node; assigning a modified cache state to said cache data block in response to initiating said first store operation. The method may further include initiating a first load operation to said cache data block from a second processing node; and assigning a pairwise-shared directory state to a coherence directory entry corresponding to said cache data block in response to initiating said first load operation, where the pairwise-shared directory state is distinct from a shared directory state.
REFERENCES:
patent: 2009/0019230 (2009-01-01), Colglazier et al.
patent: 2009/0083498 (2009-03-01), Hansen et al.
patent: 2009/0100227 (2009-04-01), Hansen et al.
GLOBALFOUNDRIES Inc.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Patel Hetul
Petro Anthony M.
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