Semiconductor memory device and method for driving the same

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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Details

C365S236000, C365S189070, C365S191000, C365S233100, C365S233110

Reexamination Certificate

active

07660171

ABSTRACT:
A semiconductor memory device includes: a first count unit for counting a delayed locked loop (DLL) clock in response to a clock enable signal; a first delay unit for delaying the clock enable signal for a delay time which corresponds to a delay amount of a delay model included in a DLL circuit; a second count unit for counting an external clock in response to the delayed clock enable signal; a comparison unit for comparing an output of the first count unit with an output of the second count unit in order to generate a latency signal; and an output enable signal generation unit for generating an output enable signal by using the latency signal.

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