Semiconductor integrated circuits including clock delay...

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S233100, C365S233110

Reexamination Certificate

active

07859940

ABSTRACT:
A semiconductor integrated circuit may include: a mode register and a clock delay control circuit. The mode register may store latency information corresponding to a plurality of frequencies. The clock delay control circuit may generate a delay clock signal using an external clock signal and the latency information. The delay clock signal may be used to control a timing margin of output data read during synchronous burst read operations of a non-volatile memory. A non-volatile memory device may include the semiconductor integrated circuit and a data output unit. The data output unit may use the delay clock signal to control the timing margin of the output data read during synchronous burst read operations. A memory system may include the semiconductor integrated circuit. A computing system may the semiconductor integrated circuit, as well as one or more of a memory controller, bus, modem, microprocessor, user interface, and battery.

REFERENCES:
patent: 6430696 (2002-08-01), Keeth
patent: 6618320 (2003-09-01), Hasegawa et al.
patent: 7035148 (2006-04-01), Chung et al.
patent: 2008/0209266 (2008-08-01), Lee et al.
patent: 2005-228427 (2005-08-01), None

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