Arithmetic logic unit temporary registers

Details Arithmetic logic unit temporary registers Arithmetic logic unit temporary registers

2007-10-09

2010-02-09

Hsu, Joni (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Logical operations

C345S559000, C345S506000

Reexamination Certificate

active

07659909

ABSTRACT:
An arithmetic logic unit (ALU) in a graphics processor is described. The ALU includes circuitry for performing an operation using a first set of pixel data. The first set of pixel data is resident in a pipeline register coupled to the circuitry. A temporary register is coupled to the circuitry. The temporary register can receive a result of the operation. The temporary register allows a result generated using one set of pixel data to be used with a subsequent set of pixel data in the same ALU. The result of the operation can thus be used in a second operation with a second set of pixel data that resides in the pipeline register after the first set of pixel data.

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