Dynamic random access memory

Details Dynamic random access memory Dynamic random access memory

2007-11-09

2010-06-08

Parker, Kenneth A (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE27098, C257SE27084

Reexamination Certificate

active

07732849

ABSTRACT:
A dynamic random access memory (DRAM) is provided. The DRAM comprises a substrate, a vertical transistor, a deep trench capacitor and a buried strap. The substrate has a trench and a deep trench located on one side of the trench thereon. The vertical transistor is disposed in the trench, a portion of which is disposed on the substrate. The deep trench capacitor is disposed in the deep trench, and comprises a bottom electrode, a capacitor dielectric layer and a top electrode. The vertical transistor comprises a gate structure disposed in the trench and above the substrate, a first doped region disposed in the substrate on sidewalls and bottom of the trench, and a second doped region disposed in the substrate on top of the trench. The buried strap is disposed in the substrate below the vertical transistor, and is adjoined to the first doped region and the top electrode.

REFERENCES:
patent: 5064777 (1991-11-01), Dhong et al.
patent: 6063658 (2000-05-01), Horak et al.
patent: 6339241 (2002-01-01), Mandelman et al.
patent: 6399978 (2002-06-01), Gruening et al.
patent: 6630379 (2003-10-01), Mandelman et al.
patent: 6930004 (2005-08-01), Wang et al.
patent: 2007/0082444 (2007-04-01), Chien

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