Method of controlling a semiconductor memory device applied...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C711S115000, C711S154000

Reexamination Certificate

active

07657697

ABSTRACT:
Plural second logic blocks are set to a first logic block, and when data is written to the second logic block, write waiting is given using an address next to the address of the current second logic block. In order to protect data of the written second logic block, the next address is skipped using another address as an expected value.

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English Translation of JP2004220068A, p. 1-9, Aug. 5, 2004.

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