Nonvolatile semiconductor memory

Details Nonvolatile semiconductor memory Nonvolatile semiconductor memory

2007-10-10

2010-06-29

Mandala, Victor A (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S202000, C257S314000, C257SE27060, C257SE27081

Reexamination Certificate

active

07745884

ABSTRACT:
A nonvolatile semiconductor memory of an aspect of the present invention comprises a plurality of memory cell transistors which are connected in series to one another with a first gate spacing, every two adjacent transistors of the memory cell transistors sharing a source/drain diffusion layer, and a first select gate transistor which shares a source/drain diffusion layer with an endmost memory cell transistor that is located at one end of the series connection of the memory cell transistors and is adjacent to that memory cell transistor with a second gate spacing. The second gate spacing is set larger than the first gate spacing and the source/drain diffusion layer shared by the endmost memory cell transistor and the first select gate transistor contains a region which is higher in impurity concentration than the source/drain diffusion layer shared by two adjacent memory cell transistors.

REFERENCES:
patent: 2005/0083744 (2005-04-01), Arai et al.
patent: 2006/0038218 (2006-02-01), Yaegashi et al.
patent: 2006/0203558 (2006-09-01), Tanaka et al.
patent: 2006/0289938 (2006-12-01), Kim
patent: 2008/0212373 (2008-09-01), Hasegawa et al.
U.S. Appl. No. 12/565,181, filed Sep. 23, 2009, Sato, et al.

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