Array substrate having enhanced aperture ratio, method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material

Reexamination Certificate

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Details

C257S071000, C257S072000, C257S296000, C257S300000, C257SE27093, C257SE27043, C257SE27037, C349S038000, C349S039000

Reexamination Certificate

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07838879

ABSTRACT:
An array substrate includes a substrate, a thin film transistor, a passivation layer, a pixel electrode and a storage capacitor. The thin film transistor includes a gate electrode formed on the substrate, a gate insulation layer formed on the substrate having the gate electrode, a semiconductor layer formed on the gate insulation layer and a data electrode formed on the semiconductor layer. The passivation layer is formed on the substrate having the data electrode and the pixel electrode is electrically connected to the data electrode through a contact hole formed through the passivation layer. The storage capacitor includes a first storage capacitor electrode that is spaced apart from the gate electrode of the thin film transistor and a second storage capacitor electrode that is formed on the gate insulation and including a same material as the pixel electrode.

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patent: 1605920 (2005-04-01), None

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