Single-cycle FFT butterfly calculator

Details Single-cycle FFT butterfly calculator Single-cycle FFT butterfly calculator

2007-10-31

2010-12-07

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S320000, C438S217000, C438S228000

Reexamination Certificate

active

07847349

ABSTRACT:
In accordance with exemplary embodiments, a Fast Fourier Transform (FFT) architecture includes elements that perform a radix-2 FFT butterfly in one processor clock cycle at steady state. Some exemplary implementations of the FFT architecture incorporate register and data path elements that relieve memory bandwidth limitations by pairing operands consumed by and results generated by two adjacent butterflies in the overall N-point FFT operation.

REFERENCES:
patent: 6662367 (2003-12-01), Dapper et al.

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