Semiconductor package and method for manufacturing the same...

Details Semiconductor package and method for manufacturing the same... Semiconductor package and method for manufacturing the same...

2008-03-07

2010-06-08

Ngo, Ngan (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S733000, C257S786000, C257SE23021

Reexamination Certificate

active

07732931

ABSTRACT:
A semiconductor package and a method for manufacturing the same. The semiconductor package includes a semiconductor chip having bonding pads; a first insulation layer pattern; redistribution line patterns; a second insulation layer pattern; and conductive balls. The first insulation layer pattern having first openings exposing the bonding pads. The redistribution line patterns are located on the first insulation layer pattern and are electrically connected with the bonding pads. The second insulation layer pattern covering the redistribution line patterns and having second openings having first open areas which expose portions of the redistribution line patterns and having second open areas which extend from the first open areas along the semiconductor chip. The conductive balls are electrically connected with the portions of the redistribution line patterns which are exposed through the first open areas of the second insulation layer pattern.

REFERENCES:
patent: 7321164 (2008-01-01), Hsu
patent: 2002/0185721 (2002-12-01), Hwang et al.
patent: 2004/0041166 (2004-03-01), Morrison
patent: 1020060036881 (2006-05-01), None
patent: 1020070104919 (2007-10-01), None

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