Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-04-04
2010-10-19
Elmore, Stephen C (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S146000, C718S001000
Reexamination Certificate
active
07818507
ABSTRACT:
Methods and apparatus provide for sending a data command from a first of a plurality of devices to a first address concentrator within a first of a plurality of processing systems; selecting one of the other processing systems, the selected processing system having data addressed by the data command stored therein; sending the data command to a first address concentrator of the selected processing system; and broadcasting the data command from the first address concentrator of the selected processing system to a second address concentrator in each of the processing systems.
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Office action for corresponding Japanese application No. 2006102826, dated Sep. 15, 2009.
Office Action for corresponding Japanese Application JP 2006-102826, dated May 18, 2010.
Brown Jeffrey Douglas
Clark Scott Douglas
Johns Charles Ray
Yamazaki Takeshi
Dernier, Esq. Matthew B.
Elmore Stephen C
Giardino, Jr. Mark A
Gibson & Dernier LLP
International Business Machines - Corporation
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