Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2008-04-24
2010-10-26
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07823115
ABSTRACT:
A method and service of balancing delay in a circuit design begins with nodes that are to be connected together by a wiring design, or by being supplied with an initial wiring design that is to be altered. The wiring design will have many wiring paths, such as a first wiring path, a second wiring path, etc. Two or more of the wiring paths are designed to have matching timing, such that the time needed for a signal to travel along the first wiring path is about the same time needed for a signal to travel along the second wiring path, the third path, etc. The method/service designs one or all of the wiring paths to make the paths traverse wire segments of about the same length and orientation, within each wiring level that the first wiring path and the second wiring path traverse. Also, this process makes the first wiring path and the second wiring path traverse the wire segments in the same order, within each wiring level that the first wiring path and the second wiring path traverse.
REFERENCES:
patent: 5109168 (1992-04-01), Rusu
patent: 5550748 (1996-08-01), Xiong
patent: 6311313 (2001-10-01), Camporese et al.
patent: 6466008 (2002-10-01), Fung et al.
patent: 7003754 (2006-02-01), Teig et al.
Habitz et al., U.S. Appl. No. 12/107,158, BUR920040217US2, Office Action Communication, Mar. 26, 2010, 6 pages.
Habitz Peter A.
Hathaway David J.
Hayes Jerry D.
Polson Anthony D.
Gibb I.P. Law Firm LLC
International Business Machines - Corporation
Kotulak, Esq. Richard M.
Whitmore Stacy A
LandOfFree
Method of generating wiring routes with matching delay in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of generating wiring routes with matching delay in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of generating wiring routes with matching delay in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4185673