Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-09-14
2010-12-14
Abraham, Esaw T (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S758000, C714S805000, C714S755000
Reexamination Certificate
active
07853857
ABSTRACT:
A wireless communication device including a first CRC coder that generates a first block of CRC parity bits on a transport block and associates the first block of CRC parity bits with the transport block, a segmenting entity that segments the transport block into multiple code blocks after associating, and a second coder that generates a second block of CRC parity bits on each code block and associates a second block of CRC parity bits with each code block. The first and second blocks of CRC parity bits are based on first and second generator polynomials.
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3GPP TS 25212 V6 4 0 Mar. 2005.
Blankenship Yufei W.
Buckley Michael E.
Classon Brian K.
Nimbalker Ajit
Stewart Kenneth A.
Abraham Esaw T
Bowler II Roland K.
Motorola Mobility, Inc.
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