Testing non-volatile memory devices for charge leakage

Details Testing non-volatile memory devices for charge leakage Testing non-volatile memory devices for charge leakage

2006-02-24

2010-11-02

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Testing

C365S200000, C365S106000, C365S114000

Reexamination Certificate

active

07826287

ABSTRACT:
The method of and apparatus for testing a floating gate non-volatile memory semiconductor device comprising an array of cells including floating gates for storing data in the form of electrical charge. The method includes applying a test pattern of said electrical charge to the floating gates, exposing the device to energy to accelerate leakage of the electrical charges out of the cells, and subsequently comparing the remaining electrical charges in the cells to the test pattern. The energy is applied in the form of electromagnetic radiation of a wavelength such as to excite the charges in the floating gates to an energy level sufficient for accelerating charge loss from the floating gates of defective cells relative to charge loss from non-defective cells. The wavelength is preferably in the range of 440 to 560 nm.

REFERENCES:
patent: 4799021 (1989-01-01), Cozzi
patent: 5109257 (1992-04-01), Kondo
patent: 5265099 (1993-11-01), Feinstein et al.
patent: 5519334 (1996-05-01), Dawson
patent: 5986461 (1999-11-01), Kalb et al.
patent: 6541987 (2003-04-01), Bruce
patent: 2002/0021141 (2002-02-01), Hartmann
patent: 2003/0001597 (2003-01-01), Juhn et al.
PCT/EP2006/002854 Search Report and Written Opinion, Aug. 10, 2006.
Brown, “Telecommunications” T&A Constable, Ltd., 1974, Edinburch XP002391993, p. 5, paragraph 1.4-p. 7, line 18; figure 1.3.
Lanzoni, et al. “Evaluation of EEPROM data retention by field acceleration”, 1991 Quality and Reliability Engineering Int'l, vol. 7.
JESD22-A117, “EEPROM Program/Erase endurance and data retention”, Mar. 2006, 16 pages, JEDEC Solid State Technology Association, USA.
JESD22-A103-B, “High Temperature Storage Life”, Aug. 2001, 10 pages, JEDEC Solid State Technology Association, USA.

Affiliated with

Also associated with

Rating

Testing non-volatile memory devices for charge leakage does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Testing non-volatile memory devices for charge leakage, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Testing non-volatile memory devices for charge leakage will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4161965