Non-volatile semiconductor storage device

Details Non-volatile semiconductor storage device Non-volatile semiconductor storage device

2007-10-15

2010-06-08

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

With shift register

C365S185090, C365S189140, C365S189180, C365S189050, C365S221000, C365S225700, C365S239000, C365S240000

Reexamination Certificate

active

07733713

ABSTRACT:
A memory cell array includes a plurality of non-volatile semiconductor memory elements, each memory element storing data in a non-volatile manner. A shift register stores data read from the semiconductor memory element and sequentially transfers the data outside, the shift register also stores data transferred from outside and stores the data in the semiconductor memory element. A syndrome generation circuit is connected to an output terminal of the shift register, the syndrome generation circuit generating syndrome of data output from the output terminal. An error-correction circuit uses the data and the syndrome to correct an error of the data.

REFERENCES:
patent: 6804156 (2004-10-01), Ito
patent: 7266025 (2007-09-01), Nagai et al.
patent: 2004/0066684 (2004-04-01), Ito
patent: 2004/0165467 (2004-08-01), Sasaki et al.
patent: 2007/0070693 (2007-03-01), Nakano et al.
patent: 2008/0016427 (2008-01-01), Namekawa et al.
patent: 2010/0011266 (2010-01-01), Kurjanowicz
Ito et al, Pure CMOS One-Time Programmable Memory Using Gate-Ox Anti-Fuse, Proc. of the IEEE 2004 Custom Integrated Circuits Conference, pp. 469-472.

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