Semiconductor memory device having dummy cells of divided charge

Static information storage and retrieval – Read/write circuit – Differential sensing

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365189, G11C 702, G11C 700

Patent

active

047003294

ABSTRACT:
A semiconductive memory in accordance with the present invention enables the correct setting of the reference electrical potential of a DRAM which is not affected by manufacturing processes by the use of a construction such that, into two dummy cell capacitors having the same capacitance as that of memory cell capacitors for holding information, signals of "1" and "0" or "0" and "1" are respectively written from the first and the second bit lines; thereafter, two dummy cell capacitors are electrically decoupled from the two bit lines and, then, by coupling two dummy cell capacitors, reference charges are obtained, which are then read out.

REFERENCES:
patent: 4291394 (1981-09-01), Nakano et al.
patent: 4491858 (1985-01-01), Kawamoto
patent: 4498154 (1985-02-01), Hoffmann
patent: 4598387 (1986-07-01), Chuang et al.

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