Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2006-03-15
2010-02-23
Garber, Charles D (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S407000, C438S480000, C257SE21563
Reexamination Certificate
active
07666721
ABSTRACT:
An improved semiconductor-on-insulator (SOI) substrate is provided, which contains a patterned buried insulator layer at varying depths. Specifically, the SOI substrate has a substantially planar upper surface and comprises: (1) first regions that do not contain any buried insulator, (2) second regions that contain first portions of the patterned buried insulator layer at a first depth (i.e., measured from the planar upper surface of the SOI substrate), and (3) third regions that contain second portions of the patterned buried insulator layer at a second depth, where the first depth is larger than the second depth. One or more field effect transistors (FETs) can be formed in the SOI substrate. For example, the FETs may comprise: channel regions in the first regions of the SOI substrate, source and drain regions in the second regions of the SOI substrate, and source/drain extension regions in the third regions of the SOI substrate.
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Stanley Wolf, Silicon Processing For the VLSI Era, 1990, vol. II, pp. 66-67.
Dyer Thomas W.
Luo Zhijiong
Yang Haining S.
Garber Charles D
International Business Machines - Corporation
Isaac Stanetta D
Schnurmann H. Daniel
Scully , Scott, Murphy & Presser, P.C.
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