Insulated gate semiconductor device and method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S332000

Reexamination Certificate

active

07847345

ABSTRACT:
There is provided a structure wherein an emitter layer3is provided in the region A on the first major surface side of a semiconductor substrate1, and emitter layer3is not provided in the region b. There is provided a structure wherein a collector P layer5is provided in the region A on the second major surface side of a semiconductor substrate1, and a cathode N layer4is provided in the region B. Specifically, there is provided a structure wherein IGBTs are composed in the region A, and diodes are composed in the region B. By the above-described structure, ON characteristics when the gate is turned on can be improved while suppressing the elevation of the forward voltage Vf and the recovery current of the diodes.

REFERENCES:
patent: 5702961 (1997-12-01), Park
patent: 6069371 (2000-05-01), Omura et al.
patent: 2005/0045960 (2005-03-01), Takahashi
patent: 2005/0073030 (2005-04-01), Inoue et al.
patent: 2007/0069287 (2007-03-01), Takahashi
patent: 1505173 (2004-06-01), None
patent: 1591902 (2005-03-01), None
patent: 10 2004 035 788 (2005-03-01), None
patent: 10 2004 040 997 (2005-03-01), None
patent: 10 2006 049 212 (2007-05-01), None
patent: 11-274516 (1999-10-01), None
patent: 2005-101514 (2005-04-01), None
U.S. Appl. No. 12/099,599, filed Apr. 8, 2002, Takahashi, et al.

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