Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
2007-09-28
2010-12-07
Sorrell, Eron J (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
Reexamination Certificate
active
07849235
ABSTRACT:
In response to a request from a central processing unit (CPU)11(i.e., firmware) of a node10, a transfer control unit14aof a direct memory access (DMA) controller14transmits a message and data to another discretionary node3by way of a serial bus1, a switch2or the like. In this event, the firmware stores data to be transmitted, a message, and a descriptor thereof in memory12. In the case of requesting the transmission of the message, the descriptor contains a flag indicating “whether or not there is a need to wait for a response from the data transmission destination”. If the flag is set to ON, the transfer control unit14anotifies the firmware of a simulated completion immediately instead of waiting for a completion response from the transmission destination node3.
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Haneda Terumasa
Ihara Shunichi
Masuyama Kazunori
Ogawa Yuichi
Fujitsu Limited
Sorrell Eron J
Staas & Halsey , LLP
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