Pattern creation method, mask manufacturing method and...

Details Pattern creation method, mask manufacturing method and... Pattern creation method, mask manufacturing method and...

2008-03-18

2010-02-23

Levin, Naum B (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C430S005000, C430S014000, C430S313000

Reexamination Certificate

active

07669172

ABSTRACT:
A pattern creation method, including laying out data of a most extreme end pattern of integrated circuit patterns on a first layer and laying out data of the integrated circuit patterns excluding the most extreme end pattern on a second layer, extracting data of a first most proximate pattern being most proximate to the most extreme end pattern from the second layer and converting the extracted data to a third layer, generating data of a contacting pattern which contacts both the first most proximate pattern and the most extreme end pattern in a fourth layer, generating data of a non-overlapping pattern of the contacting pattern excluding overlapping portions with the most extreme end pattern and the first most proximate pattern in a fifth layer, extracting data of a second most proximate pattern being most proximate to the non-overlapping pattern and converting the extracted data to the first layer.

REFERENCES:
patent: 2006/0194429 (2006-08-01), Hashimoto et al.
patent: 2007/0238053 (2007-10-01), Hashimoto
patent: 2007/0261016 (2007-11-01), Sandhu et al.
patent: 2008/0178141 (2008-07-01), Sato
patent: 2006-186104 (2006-07-01), None

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