Semiconductor device

Details Semiconductor device Semiconductor device

2008-03-27

2010-02-23

Tran, Thien F (Department: 2895)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

Small lead frame for connecting a large lead frame to a...

C257S676000

Reexamination Certificate

active

07667307

ABSTRACT:
To actualize a reduction in the on-resistance of a small surface mounted package having a power MOSFET sealed therein. A silicon chip is mounted on a die pad portion integrated with leads configuring a drain lead. The silicon chip has, on the main surface thereof, a source pad and a gate pad. The backside of the silicon chip configures a drain of a power MOSFET and bonded to the upper surface of a die pad portion via an Ag paste. A lead configuring a source lead is electrically coupled to the source pad via an Al ribbon, while a lead configuring a gate lead is electrically coupled to the gate pad via an Au wire.

REFERENCES:
patent: 6084264 (2000-07-01), Darwish
patent: 6538303 (2003-03-01), Kushino
patent: 6943456 (2005-09-01), Miyaki et al.
patent: 2001/0001494 (2001-05-01), Kocon
patent: 2007/0172980 (2007-07-01), Tanaka et al.
patent: 2000-164869 (2000-06-01), None
patent: 2000-299464 (2000-10-01), None
patent: 2002-313851 (2002-10-01), None

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