Method of reducing current of memory in self-refreshing mode...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S189090, C365S189110, C365S227000, C365S228000

Reexamination Certificate

active

07843754

ABSTRACT:
The present invention provides a method of reducing current of a memory in a self-refreshing mode and a related memory. The memory includes a word line driver and a controller, and the word line driver includes a transistor. The transistor has a control terminal, a first terminal coupled to a word line, and a second terminal. The method includes: after the memory enters the self-refreshing mode: controlling a voltage difference between the control terminal and the second terminal to correspond to a first value during a self-refreshing operation period; and controlling a voltage difference between the control terminal and the second terminal to correspond to a second value smaller than the first value during a non self-refreshing operation period.

REFERENCES:
patent: 7663931 (2010-02-01), Lee et al.
patent: 2006/0103434 (2006-05-01), Okamoto et al.
patent: 2007/0147153 (2007-06-01), Schneider et al.

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