Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-09-15
2010-02-16
Dinh, Paul (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07665045
ABSTRACT:
A method and mechanism is disclosed for identifying and tracking nets in an electrical design. A hierarchical design does not have to be flattened to perform the operation of identifying and tracking nets. To identify sets of connected shapes, instead of having to unfold the entire design hierarchy, only the specific instances of shapes falling within the geometric bounds of shapes identified as being part of a net needs to be unfolded to perform the search. When composing the list of nets for a hierarchical design, the unfolded shapes at other hierarchical levels of the design can be derived based upon virtual terminal structures that implicitly references nets and objects at other levels.
REFERENCES:
patent: 5838583 (1998-11-01), Varadarajan et al.
patent: 6066180 (2000-05-01), Kim et al.
patent: 6275974 (2001-08-01), Bartels et al.
patent: 6931613 (2005-08-01), Kauth et al.
patent: 2005/0132320 (2005-06-01), Allen et al.
patent: 2005/0204315 (2005-09-01), Knol et al.
patent: 2006/0112356 (2006-05-01), McGaughy et al.
Cadence Design Systems Inc.
Dinh Paul
Vista IP Law Group LLP
LandOfFree
Method and mechanism for identifying and tracking shape... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and mechanism for identifying and tracking shape..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and mechanism for identifying and tracking shape... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4152753