Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2004-09-23
2010-02-23
Thai, Tuan V (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S160000, C711S134000, C711S135000, C711S136000, C711S141000, C711S159000
Reexamination Certificate
active
07669009
ABSTRACT:
A method and apparatus for selecting and updating a replacement candidate in a cache is disclosed. In one embodiment, a cache miss may initiate the eviction of a present replacement candidate in a last-level cache. The cache miss may also initiate the selection of a future replacement candidate. Upon the selection of the future replacement candidate, the corresponding cache line may be invalidated in lower-level caches but remain resident in the last-level cache. The future replacement candidate may be updated by subsequent hits to the replacement candidate in the last-level cache prior to a subsequent cache miss.
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Crawford John H.
Kottapalli Sailesh
Blakely , Sokoloff, Taylor & Zafman LLP
Choe Yong
Intel Corporation
Thai Tuan V
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