Combined parallel/serial status register read

Details Combined parallel/serial status register read Combined parallel/serial status register read

2007-08-30

2010-10-05

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S109000, C711SE12001, C377S026000

Reexamination Certificate

active

07809901

ABSTRACT:
Methods and devices are disclosed, such as those involving a solid state memory device that includes a status register configured to be read with a combined parallel and serial read scheme. One such solid state memory includes a status register configured to store a plurality of bits indicative of status information of the memory. One such method of providing status information in the memory device includes providing the status information of a memory device in a parallel form. The method also includes providing the status information in a serial form after providing the status information in a parallel form in response to receiving at least one read command.

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